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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/dcv/MahmoudGSDB02>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hanan_A._Mahmoud>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Magdy_A._Bayoumi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mohsen_Shaaban>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sumeer_Goel>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Tarek_Darwish>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FDCV.2002.1218757>
foaf:homepage <https://doi.org/10.1109/DCV.2002.1218757>
dc:identifier DBLP conf/dcv/MahmoudGSDB02 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FDCV.2002.1218757 (xsd:string)
dcterms:issued 2002 (xsd:gYear)
rdfs:label A low power VLSI architecture for multistage interval-based motion estimation (MIME) algorithm. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hanan_A._Mahmoud>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Magdy_A._Bayoumi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mohsen_Shaaban>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sumeer_Goel>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Tarek_Darwish>
swrc:pages 159-166 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/dcv/2002>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/dcv/MahmoudGSDB02/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/dcv/MahmoudGSDB02>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/dcv/dcv2002.html#MahmoudGSDB02>
rdfs:seeAlso <https://doi.org/10.1109/DCV.2002.1218757>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/dcv>
dc:title A low power VLSI architecture for multistage interval-based motion estimation (MIME) algorithm. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document