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foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FDDECS52668.2021.9417066>
foaf:homepage <https://doi.org/10.1109/DDECS52668.2021.9417066>
dc:identifier DBLP conf/ddecs/Vasicek21 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FDDECS52668.2021.9417066 (xsd:string)
dcterms:issued 2021 (xsd:gYear)
rdfs:label Synthesis of approximate circuits for LUT-based FPGAs. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Zdenek_Vas%E2%88%9A%E2%89%A0cek>
swrc:pages 17-22 (xsd:string)
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dc:title Synthesis of approximate circuits for LUT-based FPGAs. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document