An Innovative 6T Hybrid SRAM Cell in sub-32 nm Double-Gate MOS Technology.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/delta/AmaraGT10
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2010
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An Innovative 6T Hybrid SRAM Cell in sub-32 nm Double-Gate MOS Technology.
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SRAM cell, Planar Double-Gate (DG), Fully Depleted SOI (FD-SOI), read and write tradeoffs, Ultra Low Voltage (ULV)
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An Innovative 6T Hybrid SRAM Cell in sub-32 nm Double-Gate MOS Technology.
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