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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/delta/BakhshiS08>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hamid_Sarbazi-Azad>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Saeedeh_Bakhshi>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FDELTA.2008.59>
foaf:homepage <https://doi.org/10.1109/DELTA.2008.59>
dc:identifier DBLP conf/delta/BakhshiS08 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FDELTA.2008.59 (xsd:string)
dcterms:issued 2008 (xsd:gYear)
rdfs:label Efficient VLSI Layout of Edge Product Networks. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hamid_Sarbazi-Azad>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Saeedeh_Bakhshi>
swrc:pages 555-560 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/delta/2008>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/delta/BakhshiS08/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/delta/BakhshiS08>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/delta/delta2008.html#BakhshiS08>
rdfs:seeAlso <https://doi.org/10.1109/DELTA.2008.59>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/delta>
dc:subject Edge graph product, VLSI layout, Interconnection networks, Networks on chip, Collinear layout (xsd:string)
dc:title Efficient VLSI Layout of Edge Product Networks. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document