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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/delta/NagarajanCG08>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Karthik_Chandrasekar_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Nagarajan_Venkateswaran>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Shrikanth_Ganapathy>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FDELTA.2008.112>
foaf:homepage <https://doi.org/10.1109/DELTA.2008.112>
dc:identifier DBLP conf/delta/NagarajanCG08 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FDELTA.2008.112 (xsd:string)
dcterms:issued 2008 (xsd:gYear)
rdfs:label Design for Testability of Functional Cores in High Performance Node Architectures. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Karthik_Chandrasekar_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Nagarajan_Venkateswaran>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Shrikanth_Ganapathy>
swrc:pages 302-307 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/delta/2008>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/delta/NagarajanCG08/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/delta/NagarajanCG08>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/delta/delta2008.html#NagarajanCG08>
rdfs:seeAlso <https://doi.org/10.1109/DELTA.2008.112>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/delta>
dc:subject Integrated Memory and Logic, Memory-in-Logic Cells, Higher Level Functional Units, Heterogenous Multi-Core, Performance Consistency, Reliabilty (xsd:string)
dc:title Design for Testability of Functional Cores in High Performance Node Architectures. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document