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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/delta/PrasadMASP06>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ali_Assi_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Bruce_Mills>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/P._W._Chandana_Prasad>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/S._M._N._Arosha_Senanayake>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/V._C._Prasad>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FDELTA.2006.47>
foaf:homepage <https://doi.org/10.1109/DELTA.2006.47>
dc:identifier DBLP conf/delta/PrasadMASP06 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FDELTA.2006.47 (xsd:string)
dcterms:issued 2006 (xsd:gYear)
rdfs:label Evaluation time Estimation for Pass Transistor Logic circuits. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ali_Assi_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Bruce_Mills>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/P._W._Chandana_Prasad>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/S._M._N._Arosha_Senanayake>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/V._C._Prasad>
swrc:pages 422-428 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/delta/2006>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/delta/PrasadMASP06/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/delta/PrasadMASP06>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/delta/delta2006.html#PrasadMASP06>
rdfs:seeAlso <https://doi.org/10.1109/DELTA.2006.47>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/delta>
dc:title Evaluation time Estimation for Pass Transistor Logic circuits. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document