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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/dft/HuangML97>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Fabrizio_Lombardi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Fred_J._Meyer>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Wei_Liang_Huang>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FDFTVS.1997.628324>
foaf:homepage <https://doi.org/10.1109/DFTVS.1997.628324>
dc:identifier DBLP conf/dft/HuangML97 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FDFTVS.1997.628324 (xsd:string)
dcterms:issued 1997 (xsd:gYear)
rdfs:label Multiple fault detection in logic resources of FPGAs. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Fabrizio_Lombardi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Fred_J._Meyer>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Wei_Liang_Huang>
swrc:pages 186-194 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/dft/1997>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/dft/HuangML97/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/dft/HuangML97>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/dft/dft1997.html#HuangML97>
rdfs:seeAlso <https://doi.org/10.1109/DFTVS.1997.628324>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/dft>
dc:subject field programmable gate arrays; multiple fault detection; logic resources; AND tree; OR tree; SRAM-based FPGA; testability; configurability; programmability; CLB test generation; fault model (xsd:string)
dc:title Multiple fault detection in logic resources of FPGAs. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document