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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/drc/SimonTLFBKHKGEB18>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Andre_Heinzig>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Artur_Erbe>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Boshen_Liang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/D._Fischer>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/J._W._Bartha>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jens_Trommer>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/M._Knaut>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Maik_Simon>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Muhammad_Bilal_Khan>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Thomas_Mikolajick>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Tim_Baldauf>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Walter_M._Weber>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yordan_M._Georgiev>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FDRC.2018.8442159>
foaf:homepage <https://doi.org/10.1109/DRC.2018.8442159>
dc:identifier DBLP conf/drc/SimonTLFBKHKGEB18 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FDRC.2018.8442159 (xsd:string)
dcterms:issued 2018 (xsd:gYear)
rdfs:label A wired-AND transistor: Polarity controllable FET with multiple inputs. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Andre_Heinzig>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Artur_Erbe>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Boshen_Liang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/D._Fischer>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/J._W._Bartha>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jens_Trommer>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/M._Knaut>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Maik_Simon>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Muhammad_Bilal_Khan>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Thomas_Mikolajick>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Tim_Baldauf>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Walter_M._Weber>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yordan_M._Georgiev>
swrc:pages 1-2 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/drc/2018>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/drc/SimonTLFBKHKGEB18/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/drc/SimonTLFBKHKGEB18>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/drc/drc2018.html#SimonTLFBKHKGEB18>
rdfs:seeAlso <https://doi.org/10.1109/DRC.2018.8442159>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/drc>
dc:title A wired-AND transistor: Polarity controllable FET with multiple inputs. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document