BDD Circuit Optimization for Path Delay Fault Testability. | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

Property	Value
dcterms:bibliographicCitation	<http://dblp.uni-trier.de/rec/bibtex/conf/dsd/FeySD04>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/G%E2%88%9A%E2%88%82rschwin_Fey>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Junhao_Shi>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Rolf_Drechsler>
foaf:homepage	<http://dx.doi.org/doi.org%2F10.1109%2FDSD.2004.1333273>
foaf:homepage	<https://doi.org/10.1109/DSD.2004.1333273>
dc:identifier	DBLP conf/dsd/FeySD04 (xsd:string)
dc:identifier	DOI doi.org%2F10.1109%2FDSD.2004.1333273 (xsd:string)
dcterms:issued	2004 (xsd:gYear)
rdfs:label	BDD Circuit Optimization for Path Delay Fault Testability. (xsd:string)
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/G%E2%88%9A%E2%88%82rschwin_Fey>
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Junhao_Shi>
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Rolf_Drechsler>
swrc:pages	168-172 (xsd:string)
dcterms:partOf	<https://dblp.l3s.de/d2r/resource/publications/conf/dsd/2004>
owl:sameAs	<http://bibsonomy.org/uri/bibtexkey/conf/dsd/FeySD04/dblp>
owl:sameAs	<http://dblp.rkbexplorer.com/id/conf/dsd/FeySD04>
rdfs:seeAlso	<http://dblp.uni-trier.de/db/conf/dsd/dsd2004.html#FeySD04>
rdfs:seeAlso	<https://doi.org/10.1109/DSD.2004.1333273>
swrc:series	<https://dblp.l3s.de/d2r/resource/conferences/dsd>
dc:title	BDD Circuit Optimization for Path Delay Fault Testability. (xsd:string)
dc:type	<http://purl.org/dc/dcmitype/Text>
rdf:type	swrc:InProceedings
rdf:type	foaf:Document