Shift Invert Coding (SINV) for Low Power VLSI. | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

Property	Value
dcterms:bibliographicCitation	<http://dblp.uni-trier.de/rec/bibtex/conf/dsd/NatesanR04>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Damu_Radhakrishnan>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Jayapreetha_Natesan>
foaf:homepage	<http://dx.doi.org/doi.org%2F10.1109%2FDSD.2004.1333276>
foaf:homepage	<https://doi.org/10.1109/DSD.2004.1333276>
dc:identifier	DBLP conf/dsd/NatesanR04 (xsd:string)
dc:identifier	DOI doi.org%2F10.1109%2FDSD.2004.1333276 (xsd:string)
dcterms:issued	2004 (xsd:gYear)
rdfs:label	Shift Invert Coding (SINV) for Low Power VLSI. (xsd:string)
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Damu_Radhakrishnan>
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Jayapreetha_Natesan>
swrc:pages	190-194 (xsd:string)
dcterms:partOf	<https://dblp.l3s.de/d2r/resource/publications/conf/dsd/2004>
owl:sameAs	<http://bibsonomy.org/uri/bibtexkey/conf/dsd/NatesanR04/dblp>
owl:sameAs	<http://dblp.rkbexplorer.com/id/conf/dsd/NatesanR04>
rdfs:seeAlso	<http://dblp.uni-trier.de/db/conf/dsd/dsd2004.html#NatesanR04>
rdfs:seeAlso	<https://doi.org/10.1109/DSD.2004.1333276>
swrc:series	<https://dblp.l3s.de/d2r/resource/conferences/dsd>
dc:title	Shift Invert Coding (SINV) for Low Power VLSI. (xsd:string)
dc:type	<http://purl.org/dc/dcmitype/Text>
rdf:type	swrc:InProceedings
rdf:type	foaf:Document