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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/dsd/VierhausRM07>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Heinrich_Theodor_Vierhaus>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Helmut_Rossmann>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Silvio_Misera>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FDSD.2007.4341484>
foaf:homepage <https://doi.org/10.1109/DSD.2007.4341484>
dc:identifier DBLP conf/dsd/VierhausRM07 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FDSD.2007.4341484 (xsd:string)
dcterms:issued 2007 (xsd:gYear)
rdfs:label Timing- / Power-Optimization for Digital Logic Based on Standard Cells. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Heinrich_Theodor_Vierhaus>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Helmut_Rossmann>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Silvio_Misera>
swrc:pages 303-306 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/dsd/2007>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/dsd/VierhausRM07/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/dsd/VierhausRM07>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/dsd/dsd2007.html#VierhausRM07>
rdfs:seeAlso <https://doi.org/10.1109/DSD.2007.4341484>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/dsd>
dc:title Timing- / Power-Optimization for Digital Logic Based on Standard Cells. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document