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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/dsd/ZaidiNCN08>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Atukem_Nabina>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Cedric_Nishan_Canagarajah>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Izhar_Zaidi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jos%E2%88%9A%C2%A9_L._N%E2%88%9A%C4%BC%E2%88%9A%C4%AAez-Y%E2%88%9A%C2%B0%E2%88%9A%C4%AAez>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FDSD.2008.92>
foaf:homepage <https://doi.org/10.1109/DSD.2008.92>
dc:identifier DBLP conf/dsd/ZaidiNCN08 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FDSD.2008.92 (xsd:string)
dcterms:issued 2008 (xsd:gYear)
rdfs:label Power/Area Analysis of a FPGA-Based Open-Source Processor using Partial Dynamic Reconfiguration. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Atukem_Nabina>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Cedric_Nishan_Canagarajah>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Izhar_Zaidi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jos%E2%88%9A%C2%A9_L._N%E2%88%9A%C4%BC%E2%88%9A%C4%AAez-Y%E2%88%9A%C2%B0%E2%88%9A%C4%AAez>
swrc:pages 592-598 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/dsd/2008>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/dsd/ZaidiNCN08/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/dsd/ZaidiNCN08>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/dsd/dsd2008.html#ZaidiNCN08>
rdfs:seeAlso <https://doi.org/10.1109/DSD.2008.92>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/dsd>
dc:title Power/Area Analysis of a FPGA-Based Open-Source Processor using Partial Dynamic Reconfiguration. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document