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dc:creator <https://dblp.l3s.de/d2r/resource/authors/Rym_Assila_Belhadj_Mefteh>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Wenceslas_Rahajandraibe>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Zineb_Benjelloun>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FDTIS48698.2020.9081262>
foaf:homepage <https://doi.org/10.1109/DTIS48698.2020.9081262>
dc:identifier DBLP conf/dtis/VaucheBMRBB20 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FDTIS48698.2020.9081262 (xsd:string)
dcterms:issued 2020 (xsd:gYear)
rdfs:label Design and Analysis of a Gilbert Analog Multiplier for Input Dynamic Range optimization. (xsd:string)
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foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Wenceslas_Rahajandraibe>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Zineb_Benjelloun>
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rdfs:seeAlso <https://doi.org/10.1109/DTIS48698.2020.9081262>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/dtis>
dc:title Design and Analysis of a Gilbert Analog Multiplier for Input Dynamic Range optimization. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document