On the Topography Simulation of Memory Cell Trenches for Semiconductor Manufacturing Deposition Processes using the Level Set Method.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/esm/HeitzingerS02
Home
|
Example Publications
Property
Value
dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/esm/HeitzingerS02
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Clemens_Heitzinger
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Siegfried_Selberherr
>
dc:
identifier
DBLP conf/esm/HeitzingerS02
(xsd:string)
dcterms:
issued
2002
(xsd:gYear)
rdfs:
label
On the Topography Simulation of Memory Cell Trenches for Semiconductor Manufacturing Deposition Processes using the Level Set Method.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Clemens_Heitzinger
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Siegfried_Selberherr
>
swrc:
pages
653-660
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/conf/esm/2002
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/conf/esm/HeitzingerS02/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/conf/esm/HeitzingerS02
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/conf/esm/esm2002.html#HeitzingerS02
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/conferences/esm
>
dc:
title
On the Topography Simulation of Memory Cell Trenches for Semiconductor Manufacturing Deposition Processes using the Level Set Method.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InProceedings
rdf:
type
foaf:Document