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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/esscirc/AnderssonMMR14>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Babak_Mohammadi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Joachim_Neves_Rodrigues>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Oskar_Andersson>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Pascal_Andreas_Meinerzhagen>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FESSCIRC.2014.6942067>
foaf:homepage <https://doi.org/10.1109/ESSCIRC.2014.6942067>
dc:identifier DBLP conf/esscirc/AnderssonMMR14 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FESSCIRC.2014.6942067 (xsd:string)
dcterms:issued 2014 (xsd:gYear)
rdfs:label A 35 fJ/bit-access sub-VT memory using a dual-bit area-optimized standard-cell in 65 nm CMOS. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Babak_Mohammadi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Joachim_Neves_Rodrigues>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Oskar_Andersson>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Pascal_Andreas_Meinerzhagen>
swrc:pages 243-246 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/esscirc/2014>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/esscirc/AnderssonMMR14/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/esscirc/AnderssonMMR14>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/esscirc/esscirc2014.html#AnderssonMMR14>
rdfs:seeAlso <https://doi.org/10.1109/ESSCIRC.2014.6942067>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/esscirc>
dc:title A 35 fJ/bit-access sub-VT memory using a dual-bit area-optimized standard-cell in 65 nm CMOS. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document