A low jitter 2.7mW/Gbps 180Gb/s 12-lane transmitter in a 40nm CMOS technology.
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dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/esscirc/FarzanRMPACS12
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Angus_McLaren
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/David_Cassan
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Kamran_Farzan
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Mehrdad_Ramezani
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Nadeesha_Amarasinghe
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Roman_Pahuta
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Saman_Sadr
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1109%2FESSCIRC.2012.6341299
>
foaf:
homepage
<
https://doi.org/10.1109/ESSCIRC.2012.6341299
>
dc:
identifier
DBLP conf/esscirc/FarzanRMPACS12
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1109%2FESSCIRC.2012.6341299
(xsd:string)
dcterms:
issued
2012
(xsd:gYear)
rdfs:
label
A low jitter 2.7mW/Gbps 180Gb/s 12-lane transmitter in a 40nm CMOS technology.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Angus_McLaren
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/David_Cassan
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Kamran_Farzan
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Mehrdad_Ramezani
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Nadeesha_Amarasinghe
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Roman_Pahuta
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Saman_Sadr
>
swrc:
pages
225-228
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/conf/esscirc/2012
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/conf/esscirc/FarzanRMPACS12/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/conf/esscirc/FarzanRMPACS12
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/conf/esscirc/esscirc2012.html#FarzanRMPACS12
>
rdfs:
seeAlso
<
https://doi.org/10.1109/ESSCIRC.2012.6341299
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/conferences/esscirc
>
dc:
title
A low jitter 2.7mW/Gbps 180Gb/s 12-lane transmitter in a 40nm CMOS technology.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InProceedings
rdf:
type
foaf:Document