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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/esscirc/FujiiSNMS08>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hiroaki_Suzuki>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hirofumi_Shinohara>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hiromi_Notani>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hiroshi_Makino>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Masako_Fujii>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FESSCIRC.2008.4681841>
foaf:homepage <https://doi.org/10.1109/ESSCIRC.2008.4681841>
dc:identifier DBLP conf/esscirc/FujiiSNMS08 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FESSCIRC.2008.4681841 (xsd:string)
dcterms:issued 2008 (xsd:gYear)
rdfs:label On-chip leakage monitor circuit to scan optimal reverse bias voltage for adaptive body-bias circuit under gate induced drain leakage effect. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hiroaki_Suzuki>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hirofumi_Shinohara>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hiromi_Notani>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hiroshi_Makino>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Masako_Fujii>
swrc:pages 258-261 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/esscirc/2008>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/esscirc/FujiiSNMS08/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/esscirc/FujiiSNMS08>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/esscirc/esscirc2008.html#FujiiSNMS08>
rdfs:seeAlso <https://doi.org/10.1109/ESSCIRC.2008.4681841>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/esscirc>
dc:title On-chip leakage monitor circuit to scan optimal reverse bias voltage for adaptive body-bias circuit under gate induced drain leakage effect. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document