A 500 fW/bit 14 fJ/bit-access 4kb standard-cell based sub-VT memory in 65nm CMOS.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/esscirc/MeinerzhagenAMSBR12
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dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/esscirc/MeinerzhagenAMSBR12
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Andreas_Peter_Burg
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Babak_Mohammadi
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Joachim_Neves_Rodrigues
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Oskar_Andersson
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Pascal_Andreas_Meinerzhagen
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/S._M._Yasser_Sherazi
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1109%2FESSCIRC.2012.6341319
>
foaf:
homepage
<
https://doi.org/10.1109/ESSCIRC.2012.6341319
>
dc:
identifier
DBLP conf/esscirc/MeinerzhagenAMSBR12
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1109%2FESSCIRC.2012.6341319
(xsd:string)
dcterms:
issued
2012
(xsd:gYear)
rdfs:
label
A 500 fW/bit 14 fJ/bit-access 4kb standard-cell based sub-VT memory in 65nm CMOS.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Andreas_Peter_Burg
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Babak_Mohammadi
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Joachim_Neves_Rodrigues
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Oskar_Andersson
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Pascal_Andreas_Meinerzhagen
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/S._M._Yasser_Sherazi
>
swrc:
pages
321-324
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/conf/esscirc/2012
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/conf/esscirc/MeinerzhagenAMSBR12/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/conf/esscirc/MeinerzhagenAMSBR12
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/conf/esscirc/esscirc2012.html#MeinerzhagenAMSBR12
>
rdfs:
seeAlso
<
https://doi.org/10.1109/ESSCIRC.2012.6341319
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/conferences/esscirc
>
dc:
title
A 500 fW/bit 14 fJ/bit-access 4kb standard-cell based sub-VT memory in 65nm CMOS.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InProceedings
rdf:
type
foaf:Document