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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/essderc/PuglisiZLP17>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Francesco_Maria_Puglisi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Luca_Larcher>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Nicolo_Zagni>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Paolo_Pavan>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FESSDERC.2017.8066627>
foaf:homepage <https://doi.org/10.1109/ESSDERC.2017.8066627>
dc:identifier DBLP conf/essderc/PuglisiZLP17 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FESSDERC.2017.8066627 (xsd:string)
dcterms:issued 2017 (xsd:gYear)
rdfs:label A new verilog-A compact model of random telegraph noise in oxide-based RRAM for advanced circuit design. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Francesco_Maria_Puglisi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Luca_Larcher>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Nicolo_Zagni>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Paolo_Pavan>
swrc:pages 204-207 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/essderc/2017>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/essderc/PuglisiZLP17/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/essderc/PuglisiZLP17>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/essderc/essderc2017.html#PuglisiZLP17>
rdfs:seeAlso <https://doi.org/10.1109/ESSDERC.2017.8066627>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/essderc>
dc:title A new verilog-A compact model of random telegraph noise in oxide-based RRAM for advanced circuit design. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document