Device optimization for 200V GaN-on-SOI Platform for Monolithicly Integrated Power Circuits.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/essderc/SyshchykCHCWVGVCDWB22
Home
|
Example Publications
Property
Value
dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/essderc/SyshchykCHCWVGVCDWB22
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Anurag_Vohra
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Benoit_Bakeroot
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Deepthi_Cingu
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Dirk_Wellekens
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Karen_Geens
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Olga_Syshchyk
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Pavan_Vudumula
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Stefaan_Decoutere
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Thibault_Cosnier
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Tian-Li_Wu
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Urmimala_Chatterjee
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Zheng-Hong_Huang
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1109%2FESSDERC55479.2022.9947150
>
foaf:
homepage
<
https://doi.org/10.1109/ESSDERC55479.2022.9947150
>
dc:
identifier
DBLP conf/essderc/SyshchykCHCWVGVCDWB22
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1109%2FESSDERC55479.2022.9947150
(xsd:string)
dcterms:
issued
2022
(xsd:gYear)
rdfs:
label
Device optimization for 200V GaN-on-SOI Platform for Monolithicly Integrated Power Circuits.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Anurag_Vohra
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Benoit_Bakeroot
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Deepthi_Cingu
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Dirk_Wellekens
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Karen_Geens
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Olga_Syshchyk
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Pavan_Vudumula
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Stefaan_Decoutere
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Thibault_Cosnier
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Tian-Li_Wu
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Urmimala_Chatterjee
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Zheng-Hong_Huang
>
swrc:
pages
245-248
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/conf/essderc/2022
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/conf/essderc/SyshchykCHCWVGVCDWB22/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/conf/essderc/SyshchykCHCWVGVCDWB22
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/conf/essderc/essderc2022.html#SyshchykCHCWVGVCDWB22
>
rdfs:
seeAlso
<
https://doi.org/10.1109/ESSDERC55479.2022.9947150
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/conferences/essderc
>
dc:
title
Device optimization for 200V GaN-on-SOI Platform for Monolithicly Integrated Power Circuits.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InProceedings
rdf:
type
foaf:Document