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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/essderc/TataridouGT21>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Angeliki_Tataridou>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Christoforos_G._Theodorou>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/G%E2%88%9A%C2%A9rard_Ghibaudo>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FESSDERC53440.2021.9631802>
foaf:homepage <https://doi.org/10.1109/ESSDERC53440.2021.9631802>
dc:identifier DBLP conf/essderc/TataridouGT21 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FESSDERC53440.2021.9631802 (xsd:string)
dcterms:issued 2021 (xsd:gYear)
rdfs:label VERILOR: A Verilog-A Model of Lorentzian Spectra for Simulating Trap-related Noise in CMOS Circuits. (xsd:string)
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foaf:maker <https://dblp.l3s.de/d2r/resource/authors/G%E2%88%9A%C2%A9rard_Ghibaudo>
swrc:pages 247-250 (xsd:string)
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dc:title VERILOR: A Verilog-A Model of Lorentzian Spectra for Simulating Trap-related Noise in CMOS Circuits. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document