[RDF data]
Home | Example Publications
PropertyValue
dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/essderc/WangMRDMMOMPL23>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Chhandak_Mukherjee>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Cristell_Maneux>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Guilhem_Larrieu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Houssem_Rezgui>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ian_O%27Connor>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jonas_M%E2%88%9A%C4%BEller>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Marina_Deng>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sara_Mannaa>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sylvain_Pelloquin>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yifan_Wang>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FESSDERC59256.2023.10268560>
foaf:homepage <https://doi.org/10.1109/ESSDERC59256.2023.10268560>
dc:identifier DBLP conf/essderc/WangMRDMMOMPL23 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FESSDERC59256.2023.10268560 (xsd:string)
dcterms:issued 2023 (xsd:gYear)
rdfs:label Electrothermal modeling of junctionless vertical Si nanowire transistors for 3D logic circuit design. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Chhandak_Mukherjee>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Cristell_Maneux>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Guilhem_Larrieu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Houssem_Rezgui>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ian_O%27Connor>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jonas_M%E2%88%9A%C4%BEller>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Marina_Deng>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sara_Mannaa>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sylvain_Pelloquin>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yifan_Wang>
swrc:pages 57-60 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/essderc/2023>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/essderc/WangMRDMMOMPL23/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/essderc/WangMRDMMOMPL23>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/essderc/essderc2023.html#WangMRDMMOMPL23>
rdfs:seeAlso <https://doi.org/10.1109/ESSDERC59256.2023.10268560>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/essderc>
dc:title Electrothermal modeling of junctionless vertical Si nanowire transistors for 3D logic circuit design. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document