Dual Edge Triggered Flip-Flops for Noise Aware Design. | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

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dcterms:bibliographicCitation	<http://dblp.uni-trier.de/rec/bibtex/conf/ets/Miura11>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Yukiya_Miura>
foaf:homepage	<http://dx.doi.org/doi.org%2F10.1109%2FETS.2011.28>
foaf:homepage	<https://doi.org/10.1109/ETS.2011.28>
dc:identifier	DBLP conf/ets/Miura11 (xsd:string)
dc:identifier	DOI doi.org%2F10.1109%2FETS.2011.28 (xsd:string)
dcterms:issued	2011 (xsd:gYear)
rdfs:label	Dual Edge Triggered Flip-Flops for Noise Aware Design. (xsd:string)
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Yukiya_Miura>
swrc:pages	217 (xsd:string)
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rdfs:seeAlso	<https://doi.org/10.1109/ETS.2011.28>
swrc:series	<https://dblp.l3s.de/d2r/resource/conferences/ets>
dc:subject	data signal, dependable design, edge triggered flip-flop, noise, synchronous circuits (xsd:string)
dc:title	Dual Edge Triggered Flip-Flops for Noise Aware Design. (xsd:string)
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