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dc:creator <https://dblp.l3s.de/d2r/resource/authors/Christian_Weis>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jan_Lappas>
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dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mehdi_B._Tahoori>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Norbert_Wehn>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Zhe_Zhang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Zhihang_Wu>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FETS54262.2022.9810410>
foaf:homepage <https://doi.org/10.1109/ETS54262.2022.9810410>
dc:identifier DBLP conf/ets/ZhangLCWWNWT22 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FETS54262.2022.9810410 (xsd:string)
dcterms:issued 2022 (xsd:gYear)
rdfs:label Machine learning based soft error rate estimation of pass transistor logic in high-speed communication. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Andr%E2%88%9A%C2%A9_Lucas_Chinazzo>
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swrc:pages 1-4 (xsd:string)
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rdfs:seeAlso <https://doi.org/10.1109/ETS54262.2022.9810410>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/ets>
dc:title Machine learning based soft error rate estimation of pass transistor logic in high-speed communication. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document