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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/euc/HuangWH07>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Chu-Liao_Wang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Man-Lin_Huang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Shih-Hsu_Huang>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2F978-3-540-77092-3%5F44>
foaf:homepage <https://doi.org/10.1007/978-3-540-77092-3_44>
dc:identifier DBLP conf/euc/HuangWH07 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2F978-3-540-77092-3%5F44 (xsd:string)
dcterms:issued 2007 (xsd:gYear)
rdfs:label A Floorplan-Based Power Network Analysis Methodology for System-on-Chip Designs. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Chu-Liao_Wang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Man-Lin_Huang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Shih-Hsu_Huang>
swrc:pages 507-516 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/euc/2007>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/euc/HuangWH07/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/euc/HuangWH07>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/euc/euc2007.html#HuangWH07>
rdfs:seeAlso <https://doi.org/10.1007/978-3-540-77092-3_44>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/euc>
dc:subject Modeling; Voltage Drop; Power Consumption; Reused Block (xsd:string)
dc:title A Floorplan-Based Power Network Analysis Methodology for System-on-Chip Designs. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document