A heuristic covering technique for optimizing average-case delay in the technology mapping of asynchronous burst-mode circuits.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/eurodac/BeerelCY96
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A heuristic covering technique for optimizing average-case delay in the technology mapping of asynchronous burst-mode circuits.
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A heuristic covering technique for optimizing average-case delay in the technology mapping of asynchronous burst-mode circuits.
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