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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/eurodac/BurgessW90>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/C._Wouters>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/R._Burgess>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FEDAC.1990.136633>
foaf:homepage <https://doi.org/10.1109/EDAC.1990.136633>
dc:identifier DBLP conf/eurodac/BurgessW90 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FEDAC.1990.136633 (xsd:string)
dcterms:issued 1990 (xsd:gYear)
rdfs:label PARAGON: a new package for gate matrix layout synthesis. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/C._Wouters>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/R._Burgess>
swrc:pages 129-134 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/eurodac/1990>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/eurodac/BurgessW90/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/eurodac/BurgessW90>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/eurodac/euro-dac1990.html#BurgessW90>
rdfs:seeAlso <https://doi.org/10.1109/EDAC.1990.136633>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/eurodac>
dc:subject cell generation, gate-matrix layout, logic synthesis, optimisation, physical design, placement, routing, simulated annealing (xsd:string)
dc:title PARAGON: a new package for gate matrix layout synthesis. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document