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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/eurogp/CheangLL04>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kin-Hong_Lee>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kwong-Sak_Leung>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sin_Man_Cheang>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2F978-3-540-24650-3%5F3>
foaf:homepage <https://doi.org/10.1007/978-3-540-24650-3_3>
dc:identifier DBLP conf/eurogp/CheangLL04 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2F978-3-540-24650-3%5F3 (xsd:string)
dcterms:issued 2004 (xsd:gYear)
rdfs:label Designing Optimal Combinational Digital Circuits Using a Multiple Logic Unit Processor. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kin-Hong_Lee>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kwong-Sak_Leung>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sin_Man_Cheang>
swrc:pages 23-34 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/eurogp/2004>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/eurogp/CheangLL04/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/eurogp/CheangLL04>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/eurogp/eurogp2004.html#CheangLL04>
rdfs:seeAlso <https://doi.org/10.1007/978-3-540-24650-3_3>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/eurogp>
dc:title Designing Optimal Combinational Digital Circuits Using a Multiple Logic Unit Processor. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document