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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/euromicro/BoschCE97>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/A._Carloganu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Daniel_Etiemble>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/P._Bosch>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FEURMIC.1997.617339>
foaf:homepage <https://doi.org/10.1109/EURMIC.1997.617339>
dc:identifier DBLP conf/euromicro/BoschCE97 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FEURMIC.1997.617339 (xsd:string)
dcterms:issued 1997 (xsd:gYear)
rdfs:label Complete x86 instruction trace generation from hardware bus collect. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/A._Carloganu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Daniel_Etiemble>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/P._Bosch>
swrc:pages 402-408 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/euromicro/1997>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/euromicro/BoschCE97/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/euromicro/BoschCE97>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/euromicro/euromicro1997.html#BoschCE97>
rdfs:seeAlso <https://doi.org/10.1109/EURMIC.1997.617339>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/euromicro>
dc:subject computer architecture; complete x86 instruction trace generation; hardware bus collect; architectural improvements; microprocessors; memory hierarchies; trace driven simulation; benchmark traces; performance data; hardware/software approach; x86 execution traces; commercial analyzer (xsd:string)
dc:title Complete x86 instruction trace generation from hardware bus collect. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document