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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/euromicro/FilhoFW96>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Andrew_Wolfe>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Edil_S._T._Fernandes>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Eliseu_M._Chaves_Filho>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FEURMIC.1996.546493>
foaf:homepage <https://doi.org/10.1109/EURMIC.1996.546493>
dc:identifier DBLP conf/euromicro/FilhoFW96 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FEURMIC.1996.546493 (xsd:string)
dcterms:issued 1996 (xsd:gYear)
rdfs:label Load Balancing in Superscalar Architectures. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Andrew_Wolfe>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Edil_S._T._Fernandes>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Eliseu_M._Chaves_Filho>
swrc:pages 651- (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/euromicro/1996>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/euromicro/FilhoFW96/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/euromicro/FilhoFW96>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/euromicro/euromicro1996.html#FilhoFW96>
rdfs:seeAlso <https://doi.org/10.1109/EURMIC.1996.546493>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/euromicro>
dc:subject parallel architectures; superscalar architectures; load balancing; instruction-level parallelism; multiple functional units; parallel instruction execution; application program; hardware resources; processor throughput; computational load; dynamic instruction-issuing algorithm; performance; superscalar processors (xsd:string)
dc:title Load Balancing in Superscalar Architectures. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document