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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/euromicro/KotasekZ97>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/F._Zboril>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Zdenek_Kot%E2%88%9A%C2%B0sek>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FEURMIC.1997.617229>
foaf:homepage <https://doi.org/10.1109/EURMIC.1997.617229>
dc:identifier DBLP conf/euromicro/KotasekZ97 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FEURMIC.1997.617229 (xsd:string)
dcterms:issued 1997 (xsd:gYear)
rdfs:label RT level testability analysis to reduce test application time. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/F._Zboril>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Zdenek_Kot%E2%88%9A%C2%B0sek>
swrc:pages 104- (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/euromicro/1997>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/euromicro/KotasekZ97/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/euromicro/KotasekZ97>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/euromicro/euromicro1997.html#KotasekZ97>
rdfs:seeAlso <https://doi.org/10.1109/EURMIC.1997.617229>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/euromicro>
dc:subject logic testing; register transfer level testability analysis; test application time reduction; RTL element classification; RTL circuit transformation; labelled directed graph; PROLOG environment; implementation principles (xsd:string)
dc:title RT level testability analysis to reduce test application time. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document