A VLSI implementation of an arithmetic coder for image compression. | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

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dcterms:bibliographicCitation	<http://dblp.uni-trier.de/rec/bibtex/conf/euromicro/PeonOB97>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Javier_D._Bruguera>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Mercedes_Pe%E2%88%9A%E2%89%A5n>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Roberto_R._Osorio>
foaf:homepage	<http://dx.doi.org/doi.org%2F10.1109%2FEURMIC.1997.617380>
foaf:homepage	<https://doi.org/10.1109/EURMIC.1997.617380>
dc:identifier	DBLP conf/euromicro/PeonOB97 (xsd:string)
dc:identifier	DOI doi.org%2F10.1109%2FEURMIC.1997.617380 (xsd:string)
dcterms:issued	1997 (xsd:gYear)
rdfs:label	A VLSI implementation of an arithmetic coder for image compression. (xsd:string)
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Javier_D._Bruguera>
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Mercedes_Pe%E2%88%9A%E2%89%A5n>
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Roberto_R._Osorio>
swrc:pages	591- (xsd:string)
dcterms:partOf	<https://dblp.l3s.de/d2r/resource/publications/conf/euromicro/1997>
owl:sameAs	<http://bibsonomy.org/uri/bibtexkey/conf/euromicro/PeonOB97/dblp>
owl:sameAs	<http://dblp.rkbexplorer.com/id/conf/euromicro/PeonOB97>
rdfs:seeAlso	<http://dblp.uni-trier.de/db/conf/euromicro/euromicro1997.html#PeonOB97>
rdfs:seeAlso	<https://doi.org/10.1109/EURMIC.1997.617380>
swrc:series	<https://dblp.l3s.de/d2r/resource/conferences/euromicro>
dc:subject	arithmetic codes; VLSI implementation; arithmetic coder; image compression; multilevel alphabet; redundant arithmetic; cumulative probabilities; interval range; interval left point; updating; module delays; design speed; chip area; operating frequency; 39 MHz (xsd:string)
dc:title	A VLSI implementation of an arithmetic coder for image compression. (xsd:string)
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