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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/europar/FernandezCH96>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/M._J._Fern%E2%88%9A%C2%B0ndez>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Manuel_Carro>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Manuel_V._Hermenegildo>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2FBFb0024769>
foaf:homepage <https://doi.org/10.1007/BFb0024769>
dc:identifier DBLP conf/europar/FernandezCH96 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2FBFb0024769 (xsd:string)
dcterms:issued 1996 (xsd:gYear)
rdfs:label IDRA (IDeal Resource Allocation): Computing Ideal Speedups in Parallel Logic Programming. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/M._J._Fern%E2%88%9A%C2%B0ndez>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Manuel_Carro>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Manuel_V._Hermenegildo>
swrc:pages 724-733 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/europar/1996-2>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/europar/FernandezCH96/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/europar/FernandezCH96>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/europar/europar96-2.html#FernandezCH96>
rdfs:seeAlso <https://doi.org/10.1007/BFb0024769>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/europar>
dc:subject Parallel Logic Programming; Simulation; Parallelism; Concurrency; Performance Evaluation (xsd:string)
dc:title IDRA (IDeal Resource Allocation): Computing Ideal Speedups in Parallel Logic Programming. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document