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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/ewdts/ShahSM16>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Anzhela_Yu._Matrosova>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Toral_Shah>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Virendra_Singh>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FEWDTS.2016.7807682>
foaf:homepage <https://doi.org/10.1109/EWDTS.2016.7807682>
dc:identifier DBLP conf/ewdts/ShahSM16 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FEWDTS.2016.7807682 (xsd:string)
dcterms:issued 2016 (xsd:gYear)
rdfs:label ROBDD based path delay fault testable combinational circuit synthesis. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Anzhela_Yu._Matrosova>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Toral_Shah>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Virendra_Singh>
swrc:pages 1-4 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/ewdts/2016>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/ewdts/ShahSM16/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/ewdts/ShahSM16>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/ewdts/ewdts2016.html#ShahSM16>
rdfs:seeAlso <https://doi.org/10.1109/EWDTS.2016.7807682>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/ewdts>
dc:title ROBDD based path delay fault testable combinational circuit synthesis. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document