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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/fccm/ChanBGKKKMSSTWXZ99>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/E._Thorne>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/J._Sun>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/J._Xu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/K._Klenk>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Katsuharu_Suzuki>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/M._Margolese>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/M._Zhu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mark_J._Boyd>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Pak_K._Chan>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/R._Kundu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sezer_G%E2%88%9A%E2%88%82ren_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/V._Kodavati>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/X._Wang>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FFPGA.1999.803709>
foaf:homepage <https://doi.org/10.1109/FPGA.1999.803709>
dc:identifier DBLP conf/fccm/ChanBGKKKMSSTWXZ99 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FFPGA.1999.803709 (xsd:string)
dcterms:issued 1999 (xsd:gYear)
rdfs:label Reducing Compilation Time of Zhong's FPGA-Based SAT Solver. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/E._Thorne>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/J._Sun>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/J._Xu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/K._Klenk>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Katsuharu_Suzuki>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/M._Margolese>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/M._Zhu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mark_J._Boyd>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Pak_K._Chan>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/R._Kundu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sezer_G%E2%88%9A%E2%88%82ren_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/V._Kodavati>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/X._Wang>
swrc:pages 308-309 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/fccm/1999>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/fccm/ChanBGKKKMSSTWXZ99/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/fccm/ChanBGKKKMSSTWXZ99>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/fccm/fccm1999.html#ChanBGKKKMSSTWXZ99>
rdfs:seeAlso <https://doi.org/10.1109/FPGA.1999.803709>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/fccm>
dc:title Reducing Compilation Time of Zhong's FPGA-Based SAT Solver. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document