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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/fccm/DinizP00>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Joonseok_Park>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Pedro_C._Diniz>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FFPGA.2000.903396>
foaf:homepage <https://doi.org/10.1109/FPGA.2000.903396>
dc:identifier DBLP conf/fccm/DinizP00 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FFPGA.2000.903396 (xsd:string)
dcterms:issued 2000 (xsd:gYear)
rdfs:label Automatic Synthesis of Data Storage and Control Structures for FPGA-Based Computing Engines. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Joonseok_Park>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Pedro_C._Diniz>
swrc:pages 91-100 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/fccm/2000>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/fccm/DinizP00/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/fccm/DinizP00>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/fccm/fccm2000.html#DinizP00>
rdfs:seeAlso <https://doi.org/10.1109/FPGA.2000.903396>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/fccm>
dc:subject FPGA-based reconfigurable computing architectures, compilation, program analysis, data queues (xsd:string)
dc:title Automatic Synthesis of Data Storage and Control Structures for FPGA-Based Computing Engines. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document