An Edge-Endpoint-Based Configurable Hardware Architecture for VLSI CAD Layout Design Rule Checking.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/fccm/LuoMA99
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1999
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An Edge-Endpoint-Based Configurable Hardware Architecture for VLSI CAD Layout Design Rule Checking.
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DRC, Scanline Algorithm, Configurable Hardware, FPGA
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An Edge-Endpoint-Based Configurable Hardware Architecture for VLSI CAD Layout Design Rule Checking.
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