VHDL & VHDL-AMS Modelling and Simulation of a CMOS Imager IP.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/fdl/NavarroRMOGC05
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VHDL & VHDL-AMS Modelling and Simulation of a CMOS Imager IP.
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VHDL & VHDL-AMS Modelling and Simulation of a CMOS Imager IP.
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