Deriving Module Interconnectivity from Behavioral Specifications and Coupling a VLSI Layout Editor for Error-Free Routing.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/fjcc/LeeSS86
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1986
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Deriving Module Interconnectivity from Behavioral Specifications and Coupling a VLSI Layout Editor for Error-Free Routing.
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Deriving Module Interconnectivity from Behavioral Specifications and Coupling a VLSI Layout Editor for Error-Free Routing.
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