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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/fmcad/KhasidashviliKV09>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Andrei_Voronkov>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mahmoud_Kinanah>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Zurab_Khasidashvili>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FFMCAD.2009.5351132>
foaf:homepage <https://doi.org/10.1109/FMCAD.2009.5351132>
dc:identifier DBLP conf/fmcad/KhasidashviliKV09 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FFMCAD.2009.5351132 (xsd:string)
dcterms:issued 2009 (xsd:gYear)
rdfs:label Verifying equivalence of memories using a first order logic theorem prover. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Andrei_Voronkov>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mahmoud_Kinanah>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Zurab_Khasidashvili>
swrc:pages 128-135 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/fmcad/2009>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/fmcad/KhasidashviliKV09/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/fmcad/KhasidashviliKV09>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/fmcad/fmcad2009.html#KhasidashviliKV09>
rdfs:seeAlso <https://doi.org/10.1109/FMCAD.2009.5351132>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/fmcad>
dc:title Verifying equivalence of memories using a first order logic theorem prover. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document