Modeling and Verification of Out-of-Order Microprocessors in UCLID.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/fmcad/LahiriSB02
Home
|
Example Publications
Property
Value
dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/fmcad/LahiriSB02
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Randal_E._Bryant
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Sanjit_A._Seshia
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Shuvendu_K._Lahiri
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1007%2F3-540-36126-X%5F9
>
foaf:
homepage
<
https://doi.org/10.1007/3-540-36126-X_9
>
dc:
identifier
DBLP conf/fmcad/LahiriSB02
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1007%2F3-540-36126-X%5F9
(xsd:string)
dcterms:
issued
2002
(xsd:gYear)
rdfs:
label
Modeling and Verification of Out-of-Order Microprocessors in UCLID.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Randal_E._Bryant
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Sanjit_A._Seshia
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Shuvendu_K._Lahiri
>
swrc:
pages
142-159
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/conf/fmcad/2002
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/conf/fmcad/LahiriSB02/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/conf/fmcad/LahiriSB02
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/conf/fmcad/fmcad2002.html#LahiriSB02
>
rdfs:
seeAlso
<
https://doi.org/10.1007/3-540-36126-X_9
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/conferences/fmcad
>
dc:
title
Modeling and Verification of Out-of-Order Microprocessors in UCLID.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InProceedings
rdf:
type
foaf:Document