Circuit optimizations to minimize energy in the global interconnect of a low-power-FPGA (abstract only). | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

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dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Oluseyi_A._Ayorinde>
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dc:title	Circuit optimizations to minimize energy in the global interconnect of a low-power-FPGA (abstract only). (xsd:string)
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