Design and evaluation of a parameterizable NoC router for FPGAs (abstract only).
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/fpga/BruggeK10
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Design and evaluation of a parameterizable NoC router for FPGAs (abstract only).
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architecture, design space exploration, fpga, network-on-chip, router, system-on-chip
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Design and evaluation of a parameterizable NoC router for FPGAs (abstract only).
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