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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/fpga/CevreroAPVBGLI08>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ajay_Kumar_Verma>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Alessandro_Cevrero>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Frank_K._G%E2%88%9A%C4%BErkaynak>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hadi_Parandeh-Afshar>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Panagiotis_Athanasopoulos>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Paolo_Ienne>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Philip_Brisk>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yusuf_Leblebici>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1344671.1344699>
foaf:homepage <https://doi.org/10.1145/1344671.1344699>
dc:identifier DBLP conf/fpga/CevreroAPVBGLI08 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1344671.1344699 (xsd:string)
dcterms:issued 2008 (xsd:gYear)
rdfs:label Architectural improvements for field programmable counter arrays: enabling efficient synthesis of fast compressor trees on FPGAs. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ajay_Kumar_Verma>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Alessandro_Cevrero>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Frank_K._G%E2%88%9A%C4%BErkaynak>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hadi_Parandeh-Afshar>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Panagiotis_Athanasopoulos>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Paolo_Ienne>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Philip_Brisk>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yusuf_Leblebici>
swrc:pages 181-190 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/fpga/2008>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/fpga/CevreroAPVBGLI08/dblp>
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rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/fpga/fpga2008.html#CevreroAPVBGLI08>
rdfs:seeAlso <https://doi.org/10.1145/1344671.1344699>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/fpga>
dc:subject FPGA, field programmable counter array (FPCA) (xsd:string)
dc:title Architectural improvements for field programmable counter arrays: enabling efficient synthesis of fast compressor trees on FPGAs. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document