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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/fpga/ChauLHCYPCW09>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Brian_P._W._Chan>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kong-Pang_Pun>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Oliver_C._S._Choy>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Philip_Heng_Wai_Leong>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sam_M._H._Ho>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Steve_C._L._Yuen>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Thomas_C._P._Chau>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Xinan_Wang>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1508128.1508137>
foaf:homepage <https://doi.org/10.1145/1508128.1508137>
dc:identifier DBLP conf/fpga/ChauLHCYPCW09 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1508128.1508137 (xsd:string)
dcterms:issued 2009 (xsd:gYear)
rdfs:label A comparison of via-programmable gate array logic cell circuits. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Brian_P._W._Chan>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kong-Pang_Pun>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Oliver_C._S._Choy>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Philip_Heng_Wai_Leong>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sam_M._H._Ho>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Steve_C._L._Yuen>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Thomas_C._P._Chau>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Xinan_Wang>
swrc:pages 53-62 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/fpga/2009>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/fpga/ChauLHCYPCW09/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/fpga/ChauLHCYPCW09>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/fpga/fpga2009.html#ChauLHCYPCW09>
rdfs:seeAlso <https://doi.org/10.1145/1508128.1508137>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/fpga>
dc:subject logic cell, via-programmable gate arrays (xsd:string)
dc:title A comparison of via-programmable gate array logic cell circuits. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document