An FPGA-based transient error simulator for evaluating resilient system designs (abstract only).
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/fpga/ChenSZ13
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An FPGA-based transient error simulator for evaluating resilient system designs (abstract only).
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An FPGA-based transient error simulator for evaluating resilient system designs (abstract only).
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