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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/fpga/ChongP09>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sri_Parameswaran>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yee_Jern_Chong>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1508128.1508155>
foaf:homepage <https://doi.org/10.1145/1508128.1508155>
dc:identifier DBLP conf/fpga/ChongP09 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1508128.1508155 (xsd:string)
dcterms:issued 2009 (xsd:gYear)
rdfs:label Flexible multi-mode embedded floating-point unit for field programmable gate arrays. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sri_Parameswaran>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yee_Jern_Chong>
swrc:pages 171-180 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/fpga/2009>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/fpga/ChongP09/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/fpga/ChongP09>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/fpga/fpga2009.html#ChongP09>
rdfs:seeAlso <https://doi.org/10.1145/1508128.1508155>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/fpga>
dc:subject dual-precision, embedded block, floating-point, fpga, fpga architecture, fpu (xsd:string)
dc:title Flexible multi-mode embedded floating-point unit for field programmable gate arrays. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document