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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/fpga/ChungNHFM08>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Babak_Falsafi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Eric_S._Chung>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Eriko_Nurvitadhi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/James_C._Hoe>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ken_Mai>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1344671.1344684>
foaf:homepage <https://doi.org/10.1145/1344671.1344684>
dc:identifier DBLP conf/fpga/ChungNHFM08 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1344671.1344684 (xsd:string)
dcterms:issued 2008 (xsd:gYear)
rdfs:label A complexity-effective architecture for accelerating full-system multiprocessor simulations using FPGAs. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Babak_Falsafi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Eric_S._Chung>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Eriko_Nurvitadhi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/James_C._Hoe>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ken_Mai>
swrc:pages 77-86 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/fpga/2008>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/fpga/ChungNHFM08/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/fpga/ChungNHFM08>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/fpga/fpga2008.html#ChungNHFM08>
rdfs:seeAlso <https://doi.org/10.1145/1344671.1344684>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/fpga>
dc:subject FPGA, emulator, multicore, multiprocessor, prototype, simulator (xsd:string)
dc:title A complexity-effective architecture for accelerating full-system multiprocessor simulations using FPGAs. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document