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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/fpga/DalalS08>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Deian_Stefan>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ishaan_L._Dalal>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1344671.1344707>
foaf:homepage <https://doi.org/10.1145/1344671.1344707>
dc:identifier DBLP conf/fpga/DalalS08 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1344671.1344707 (xsd:string)
dcterms:issued 2008 (xsd:gYear)
rdfs:label A hardware framework for the fast generation of multiple long-period random number streams. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Deian_Stefan>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ishaan_L._Dalal>
swrc:pages 245-254 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/fpga/2008>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/fpga/DalalS08/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/fpga/DalalS08>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/fpga/fpga2008.html#DalalS08>
rdfs:seeAlso <https://doi.org/10.1145/1344671.1344707>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/fpga>
dc:subject FPGA, mersenne twister, parallelized architecture, random number generator (xsd:string)
dc:title A hardware framework for the fast generation of multiple long-period random number streams. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document