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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/fpga/GuoNVV04>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Frank_Vahid>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kees_A._Vissers>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Walid_A._Najjar>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Zhi_Guo>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F968280.968304>
foaf:homepage <https://doi.org/10.1145/968280.968304>
dc:identifier DBLP conf/fpga/GuoNVV04 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F968280.968304 (xsd:string)
dcterms:issued 2004 (xsd:gYear)
rdfs:label A quantitative analysis of the speedup factors of FPGAs over processors. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Frank_Vahid>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kees_A._Vissers>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Walid_A._Najjar>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Zhi_Guo>
swrc:pages 162-170 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/fpga/2004>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/fpga/GuoNVV04/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/fpga/GuoNVV04>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/fpga/fpga2004.html#GuoNVV04>
rdfs:seeAlso <https://doi.org/10.1145/968280.968304>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/fpga>
dc:subject FPGA, VHDL, analysis, performance, reconfigurable computing (xsd:string)
dc:title A quantitative analysis of the speedup factors of FPGAs over processors. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document